Search - DDR SDRAM

[Other resource] ddr_verilog_xilinx

Description: DDR（双速率）SDRAM控制器参考设计，xilinx提供-DDR (double data rate) SDRAM controller reference design for Xilinx
Platform: | Size: 131327 | Author: 陈旭 | Hits:

[Other resource] xapp858[1]

Description: XAPP858 - 利用 Virtex-5 FPGA 实现的高性能 DDR2 SDRAM 接口数据采集本应用指南描述了用于实现 667 Mbps（333 MHz）高性能 DDR2 SDRAM 接口的控制器和数据采集的技巧。本数据采集技巧使用了输入串行器/解串器（ISERDES）和输出串行器/解串器（OSERDES）的功能。-XAPP858-use Virtex-5 FPGA high-performance DDR2 SDRA M Interface Data Acquisition Guide describes the application for achieving 667 Mbps (333 MHz) high-performance DDR 2 SDRAM Interface controller and data acquisition techniques. The data collection techniques used serial input / Solution Series (ISERDES) and serial output / Solution Series (O Legacy) function.
Platform: | Size: 297475 | Author: mingming | Hits:

[Other resource] v4_ddr_sdram_controller

Description: 利用v4fpga实现sdram ddr控制器设计，很详细的，很实用的资料
Platform: | Size: 418207 | Author: hesonwhb | Hits:

[Other resource] DDR_SDRAM_verilog

Description: DDR（双速率）SDRAM控制器参考设计verilog代码，可以直接用的，很好的
Platform: | Size: 752460 | Author: 宋珂 | Hits:

[Software Engineering] DDR_SDRAM

Description: 该项对于设计DDSRAM有很大的帮助，希望可以对你有所帮助。-For the design of the DDSRAM have great help, I hope you can help.
Platform: | Size: 474112 | Author: 王辉 | Hits:

[Documents] SDRAM_and_DDRrouting

Description: SDRAM与DDR布线指南 SDRAM与DDR布线指南
Platform: | Size: 5120 | Author: tony | Hits:

[Software Engineering] sdram_introduce

Description: sdram内存技术指南（sdr,ddr,ddr2,ddr3）-sdram memory technology guide (sdr, ddr, ddr2, ddr3)
Platform: | Size: 4068352 | Author: 杨洪涛 | Hits:

[VHDL-FPGA-Verilog] sdram_vhdl

Description: DDR（双速率）SDRAM控制器参考设计verilog代码，可以直接用的，很好的。-DDR (double rate) SDRAM controller reference design Verilog code, can be directly used, very good.
Platform: | Size: 891904 | Author: 薛鹏展 | Hits:

[Linux-Unix] SDRAM_DDR_DDR-II_Rambus_DRAM

Description: 内存的原理和时序(SDRAM、DDR、DDR-Ⅱ、Rambus_DRAM)-The principle and the timing of the memory (SDRAM, DDR, DDR-II, Rambus_DRAM)
Platform: | Size: 7368704 | Author: 李先生 | Hits:

[SCM] ug_ddr_sdram

Description: DDR and DDR2 SDRAM Controller Compiler 的用户向导-DDR and DDR2 SDRAM Controller Compiler User Guide
Platform: | Size: 1005568 | Author: xl | Hits:

[VHDL-FPGA-Verilog] emi(1)

Description: the external memory interface for the ddr ddr2 ddr3 sdram device
Platform: | Size: 9606144 | Author: zhenu | Hits:

[Software Engineering] JESD79-3E

Description: This document provides implementation instructions for the DDR3 interface-This document defines the DDR3 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Specification is to define the minimum set of requirements for JEDEC compliant 512 Mb through 8 Gb for x4, x8, and x16 DDR3 SDRAM devices. This specification was created based on the DDR2 specification (JESD79-2) and some aspects of the DDR specification (JESD79). Each aspect of the changes for DDR3 SDRAM operation were considered and approved by committee ballot(s). The accumulation of these ballots were then incorporated to prepare this JESD79-3 specification, replacing whole sections and incorporating the changes into Functional Description and Operation.
Platform: | Size: 4283392 | Author: lei | Hits:

[VHDL-FPGA-Verilog] ddr_ddr2_sdram-ip

Description: 该程序为Altera 公司 DDR DDR2 SDRAM 的IP源程序安装包，非常有价值的东西，借此网址共享下。-The program for Altera Corporation DDR DDR2 SDRAM of IP source installation package, a very valuable thing, whereby the URL Sharing.
Platform: | Size: 8764416 | Author: 刘明 | Hits:

[Software Engineering] realization-of-VGA-display-with-FPGA

Description: <用FPGA实现VGA显示> 摘要：本文介绍了一种用FPGA结合DDR SDRAM和单片机，在VGA显示器上显示字符、图形信息的方法。-The realization of VGA display with FPGA
Platform: | Size: 239616 | Author: zblinux | Hits:

[Linux-Unix] qcom-gcc-msm8660

Description: Header file for the Atmel DDR SDR SDRAM Controller.
Platform: | Size: 3072 | Author: nongmaodg | Hits:

[Other] mem_interface_top_ddr_controller_0

Description: 在 Virtex™ -4 XC4VLX25 FF668 -10C 器件中实现的 DDR SDRAM 控制器。-DDR controller
Platform: | Size: 8192 | Author: 李成欢 | Hits:

[VHDL-FPGA-Verilog] ddr_sdr

Description: DDR SDRAM Controller Core - has been designed for use in XILINX Virtex II FPGAs - works with DDR SDRAM Device MT46V16M16 without changes - may be easily adapted to any other DDR SDRAM device-DDR SDRAM Controller Core - has been designed for use in XILINX Virtex II FPGAs - works with DDR SDRAM Device MT46V16M16 without changes - may be easily adapted to any other DDR SDRAM device
Platform: | Size: 37888 | Author: aa | Hits:

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list